1. Field of the Invention
The present invention relates to a method of passivating a semiconductor device with at least two types of transistors at a high pressure and, more specifically, to a method of conducting a high pressure anneal employing at least two different gases.
2. Description of the Related Art
The use of silicon in semiconductor devices, such as CMOS devices, is well known. The fabrication of CMOS devices typically requires that both n-channel (NMOS) and p-channel (PMOS) transistors are built on the same substrate through numerous steps, which include sputter deposition, photolithography, wet etching, plasma etching, chemical vapor deposition, plasma-enhanced chemical vapor deposition, ion implanting, and annealing steps for activating and driving implanted ions. A number of these steps cause defects in the device. For example, plasma etching typically leaves dangling silicon bonds that reduce electron mobility and cause degradation of the device's performance. Ion implanting can also create damage to the silicon crystal structure.
Recently, a high pressure anneal process was developed to alleviate the problems caused by such dangling bonds. During the high pressure anneal process, the semiconductor devices are typically subjected to a high pressure gas such as hydrogen or ammonia. It is thought that the defects of semiconductor devices are removed when the hydrogen bonds with the broken bonds of silicon. However, since the drains and sources of NMOS and PMOS are doped with different types of impurities which are expected to have different reaction mechanisms during the high pressure anneal process, it is a rather difficult task to optimize process parameters in the high pressure anneal process for a CMOS device. Furthermore, it is rather difficult to choose an annealing gas suitable for both NMOS and PMOS transistors.